EDN

On Semi unveils PureEdge PLL clock generators

Phoenix, Ariz. — ON Semiconductor has unveiled its PureEdge family of phase lock loop (PLL) based clock generation devices that is said to deliver 50 percent better phase jitter than competitive ...
EDN

PLL clock IC offers 10-ps rms jitter

The NB4N507A PLL clock IC generates a clock signal ranging from 50 to 200 MHz via an inexpensive reference crystal. The device offers an rms period jitter of less than 10 ps and an accuracy of 100 ppm ...
Electronic Design

Unconventional PLL Uses BTSC Pilot To Generate Master Clock

Multichannel television sound (MTS), better known as Broadcast Television System Committee (BTSC) encoding, is used in many analog cable set-top boxes for TV. The BTSC pilot is at the same frequency ...
Electronic Design

Measure Spread-Spectrum Clock’s Effects On Switching Supply EMI

Fig 1. In a typical PWM controller in which the active devices are driven by a simple square wave, a Fourier representation of the clock’s frequency spectrum consists of the fundamental switching ...
Design-Reuse

True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference

True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) for the semiconductor, systems and electronics industries. At the 62 nd Design Automation Conference ...
Design-Reuse

Creating a Frequency Plan for a System using a PLL

How do you ensure that every part of a system receives the clock it needs—without wasting power or sacrificing performance? The answer lies in creating a well-structured frequency plan built around a ...
Embedded

Dealing with PLL clock jitter in advanced processor designs: Part 3

Before we discuss the guidelines that the developer must follow when measuring TIE jitter, it is useful to also look at jitter for a much more general case in which jitter is not assumed to be ...
Electronics Weekly

Imec PLL generates FMCW signals for mmWave radar

Imec has come up with a novel digitally calibrated charge-pump (CP) phase-locked loop (PLL) that can generate high-quality frequency-modulated continuous-wave (FMCW) signals for mmWave radars at low ...
Embedded

An introduction to Synchronized Ethernet

Over the past two decades Ethernet has become the dominant technology for data transmission, in particular with telecom and wireless providers, due to its simplicity and low cost. However, the ...